Semiconductor devices, built with advanced technology nodes (e.g., below 7 nm), regardless of the structure such as ultra-thin body silicon-on-insulator (SOI) or fin field-effect transistor (FinFET) structures, may have quite thin channel thickness (e.g., within a range of about 0.5-5 nm). For these devices, two-dimensional (2D) layered materials are regarded as strong candidates to replace silicon (Si). The 2D material of interest have desired properties, for example, including self-assembled molecular monolayers (e.g., with a thickness of <1 nm), high and symmetric electron and hole mobility (e.g., >200 cm2/Vsec), and ideal surface properties without dangling bonds. The performance of 2D FETs, however, may be considerably limited by the contact resistance induced by non-ideal metal and/or 2D material contacts (e.g., with Schottky barrier). For 2D FETs, the method of reducing the contact resistance (e.g., source and drain (SD) contact resistance) may be an important role in providing a sufficient drain current (e.g., >1 μA/μm of channel width).
2D semiconductors are expected to be the channel material in the ultra-thin body transistors and are usually few-layer thick and exist as stacks of strongly bonded layers with weak interlayer van der Waals attraction. The weak interlayer attraction allows the layers to be mechanically or chemically exfoliated into individual, atomically thin layers. Examples of 2D materials include graphene, graphyne, borophene, silicene, germinate, transition metal dichalcogenide (TMDC) (e.g., molybdenum disulfide (MoS2) or tungsten selenide (WSe2)), black phosphorus, and the like.
Solutions are required that can simultaneously achieve a desired sub-threshold slope and on-current in 2D material (e.g., TMDC) channel FETs.